This invention relates to apparatus for continuously producing photovoltaic devices by depositing successive layers of semiconductor material onto a substrate as that substrate travels through at least two operatively interconnected, dedicated deposition chambers. The composition of the semiconductor layers deposited onto the substrate in each deposition chamber is dependent upon, inter alia, the particular reaction gas(es) introduced into that deposition chamber. The deposition chambers are interconnected by a relatively narrow isolation passageway (1) through which the substrate passes, and (2) which is adapted to isolate the reaction gas(es) introduced into each of the adjacent deposition chambers. Previous isolation passageways (also referred to as gas gates) which the assignee of the instant invention developed, were operatively disposed internally of one of the pair of adjacent deposition chambers. However, such internal disposition of the gas gate passageway creates difficulties when it is necessary to gain access to the interior of that passageway, for such purposes as cleaning, leak testing, modifying the passageway, etc. Access can only be obtained by (1) opening the deposition chamber in which the gas gate passageway is housed, and (2) dismantling the deposition components of the chamber as well as the complex sealing mechanism of the gas gate passageway itself. Obviously, in order to restore the apparatus to an operational state, the gas gate passageway must then be reassembled, sealed and leak-checked. Only then can the deposition chamber be closed to the environment and prepared for resumption of the deposition process.
The importance of thoroughly sealing the isolation passageway is becoming increasingly apparent. Any leakage of environmental contaminants into the deposition chambers results in the deposition of semiconductor material onto the substrate which exhibits chemical characteristics and electrical properties inferior to those chemical characteristics and electrical properties obtained when semiconductor material is deposited in substantially uncontaminated chambers. The fact that the introduction or diffusion, into the deposition chamber, of contaminants in the range of only a few parts per million is capable of producing semiconductor material of inferior quality, illustrates just how carefully it is necessary to seal the isolation passageway from the influx of environmental impurities.
Obviously, the less the time the deposition chambers are exposed to ambient conditions, the less contamination of those chambers will occur. Since in previous constructions, in order to gain access to the gas gate passageway, it was necessary to open the deposition chamber in which that passageway was housed, unnecessary contamination, not to mention the waste associated with lengthy periods of down-time and the expenditure of costly man-hours of labor resulted. Further, following every opening of the gas gate passageway, that passageway had to be carefully checked to be sure no leaks had developed. This leak testing procedure represented a time consuming and labor intensive effort. Due to the necessity of opening the deposition chamber, disassembling and reassembling the passageway, and leak-testing the isolation passageway, the deposition apparatus was subjected to lengthy periods of down-time. Obviously, it is desirable to minimize down-time in the mass production of any product, including these semiconductor devices. It is accordingly one of the advantages of the present invention to provide an isolation passageway module specially adapted for use with mass production-styled deposition apparatus, said passageway specifically designed to significantly reduce down-time related to the disassembly and reassembly thereof.
Due to the fact, as mentioned hereinabove, that air-tight seals are required in deposition apparatus specially adapted for the continuous production of semiconductor devices, any improvement in either (1) the ability of the seal to provide a barrier between environmental contaminants and the interior sanctity of the vacuum envelope developed within the deposition apparatus, or (2) the ease of gaining access to the interior of the isolation passageway without requiring the time consuming, labor intensive effort of present resealing methodology, represents an important advance in the art. It is therefore another advantage of the present invention to provide an accessible, easily reassemblable and resealable, externally disposed, isolation passageway module.
The foregoing advantages and improvements are achieved in the external isolation module of the present invention without sacrificing the operational advantages and improvements of the gas gate passageways shown and described in patent applications Ser. Nos.: 372,937 entitled Magnetic Gas Gate; 407,983 entitled Grooved Gas Gate; and 466,995 also entitled Grooved Gas Gate (all of these applications assigned to the assignee of the instant application). More particularly, such improvements as: (1) providing a magnetically attractive force within the gas gate to urge the substrate passing therethrough toward a wall of the passageway for reducing the size of the passageway opening (the '937 patent application); (2) providing a grooved interior passageway wall for maintaining a uniform, rapidly moving flow of sweep gases through the relatively narrow, upper slot of the gas gate passageway (the '983 patent application); and (3) the use of additional sweep gas intermediate the longitudinal extent of the grooved passageway wall of the gas gate (the '995 patent application); are incorporated into the external isolation module of the instant invention. The result is an accessible, environmentally-sealed, reaction material-isolating module which is readily disposable between each pair of adjacent chambers of a deposition apparatus, said deposition apparatus constructed for the continuous production of semiconductor devices.
Recently, considerable efforts have been made to develop systems for depositing amorphous semiconductor alloys, each of which can encompass relatively large areas, and which can be doped to form p-type and n-type materials for the production of p-i-n-type devices which are, in operation, substantially equivalent to their crystalline counterparts.
It is now possible to prepare amorphous silicon semiconductor alloys by glow discharge or vacuum deposition techniques, said alloys possessing (1) acceptable concentrations of localized states in the energy gaps thereof, ahd (2) high quality electronic properties. These techniques are fully described in U.S. Pat. No. 4,226,898, entitled Amorphous Semiconductors Equivalent to Crystalline Semiconductors, Stanford R. Ovshinsky and Arun Madan which issued Oct. 7, 1980; in U.S. Pat. No. 4,217,374, Stanford R. Ovshinsky and Masatsugu Izu, which issued on Aug. 12, 1980, under the same title; and in U.S. patent application Ser. No. 423,424 entitled Method of Making Amorphous Semiconductor Alloys and Devices Using Microwave Energy, Stanford R. Ovshinsky, David D. Allred, Lee Walter and Stephen J. Hudgens. As disclosed therein, it is believed fluroine introduced into the amorphous silicon semiconductor layers operates to substantially reduce the density of the localized states and facilitates the addition of other alloying materials, such as germanium.
The concept of utilizing multiple cells, to enhance photovoltaic device efficiency, was discussed at least as early as 1955 by E. D. Jackson, U.S. Pat. No. 2,949,498 issued Aug. 16, 1960. The multiple cell structures therein discussed utilized p-n junction crystalline semiconductor devices. Essentially the concept is directed to employ different band gap devices to more efficiently collect various portions of the solar spectrum and to increase open circuit voltage (Voc.). The tandem cell device has two or more cells with the light directed serially through each cell, with a large band gap material followed by smaller band gap materials to absorb the light passed through the first cell. By substantially matching the generated currents from each cell, the overall open circuit voltage is the sum of the open circuit voltage of each cell, while the short circuit current remains substantially constant.
Hamakawa et al, reported the feasibility of utilizing Si-H in a configuration which will be defined as a cascade type multiple cell. The cascade cell is hereinafter referred to as a multiple cell without a separation or insulating layer between the cell layers thereof. Each of the cells was made of an Si-H material of the same band gap as in a p-i-n junction configuration. Matching of the short circuit current (J.sub.sc) was attempted by increasing the thickness of the cells in the serial light path. As expected, the overall device Voc increased and was proportional to the number of cells.
Unlike crystalline silicon which is limited to batch processing for the manufacture of photovoltaic devices, amorphous silicon alloys can be deposited in multiple layers over large area substrates to form photovoltaic devices in a high volume, continuous processing system. Such continuous processing systems are disclosed in pending U.S. patent applications: Ser. No. 151,301, filed May 19, 1980 for A Method Of Making P-Doped Silicon Films and Devices Made Thereform; Ser. No. 244,386, filed Mar. 16, 1981 for Continuous Systems For Depositing Amorphous Semiconductor Material; Ser. No. 240,493, filed Mar. 16, 1981 for Continuous Amorphous Solar Cell Production System; Ser. No. 306,146, filed Sept. 28, 1981 for Multiple Chamber Deposition and Isolation System and Method; Ser. No. 359,825, filed Mar. 19, 1982, for Method and Apparatus for Continuously Producing Tandem Amorphous Photovoltaic Cells; and Ser. No. 460,629 filed Jan. 24, 1983, for Method and Apparatus For Continuously Producing Tandemn Amorphous Photovoltaic Cells. As disclosed in these applications, a substrate may be continuously advanced through a succession of deposition chambers, wherein each chamber is dedicated to the deposition of a specific semiconductor material. In making a solar cell of a p-i-n-type configuration, the first chamber is preferably dedicated for depositing a p-type semiconductor layer, the second chamber is preferably dedicated for depositing an intrinsic amorphous semiconductor layer, and the third chamber is preferably dedicated for depositing an n-type semiconductor layer. Since each deposited semiconductor layer, and especially the intrinsic semiconductor layer must be of high purity, the deposition environment in each of the deposition chambers is isolated from the constituents introduced into adjacent chambers, so as to prevent back diffusion of constituents between said deposition chambers. In the previously mentioned patent applications, wherein the systems are primarily concerned with the production of photovoltaic cells, isolation between the chambers is accomplished by "gas gates" through which unidirectional gas flow is established and through which an inert gas may be "swept" about the web of substrate material. However, such gas gates were operatively disposed interiorly of the intrinsic deposition chamber, thereby resulting in all of the aforementioned disadvantages of accessibility, difficulty of leak-testing and extended periods of down-time.
The external isolation module of the present invention substantially eliminates the foregoing disadvantages while incorporating all of the technological advances which such prior gas gates possessed. More particularly, the instant externally disposed isolation module includes a passageway (1) through which the substrate is adapted to pass, and (2) which is adapted to substantially prevent the reaction materials introduced into one of a pair of adjacent deposition chambers from contaminating the reaction materials introduced into the other chamber of the pair. A connection mechanism is specifically provided to adapt the isolation module for external connection between, and operational attachment to, the chambers of each pair of adjacent deposition chambers. And finally, in its broadest sense, each external isolation module also includes a sealing arrangement which provides a substantially air-tight barrier which substantially prevents environmental contaminants from entering the vacuum envelope. Further, a flow of sweep gas is used to substantially prevent cross-contamination of reaction materials, whereby the external isolation module of the present invention provides an accessible, environmentally-sealed, reaction material-isolating passageway between each pair of adjacent deposition chambers. The technological advance, mentioned supra, which are designed into and form part of the external isolation module include such features as (1) a grooved passageway wall for preventing stagnation of sweep gases flowing therethrough, (2) the central introduction of sweep gas into the relatively narrow channel of the passageway to further prevent back diffusion of reaction materials between adjacent deposition chambers, and (3) the use of magnetic attraction for urging the unlayered surface of the substrate toward the grooved wall of the passageway to permit a significant reduction in the height of the passageway. The isolation passageway of the instant invention therefore represents a great step forward in the field of the mass producing of amorphous semiconductor materials.
Other objects and advantages of the present invention will become clear from the drawings, the claims and the detailed description of the invention which follow.